ÿþ<HTML><!--SkipSubstituteVars--><head><link id="ss1" href="report_files/Verbose.css" rel="stylesheet" type="text/css" /><link id="sscommon" href="report_files/common.css" rel="stylesheet" type="text/css" /><script language="Javascript" type="text/javascript" src="report_files/ChangeStyleSheet.js"></script></head><BODY STYLE="background-color:white;font-family:Arial, helvetica, sans-serif; font-size:12pt"><SPAN class="small-interactive-table-right"><span class="tablerow"><span class="tableheadercell"> Report Style </span><span class="tablerow"><span id="compact" class="tablecell"><a href="javascript:SetStyleSheet('report_files/Compact.css', 'compact');">Compact</a></span></span><span class="tablerow"><span id="verbose" class="activetablecell"><a href="javascript:SetStyleSheet('report_files/Verbose.css', 'verbose');">Verbose</a></span></span></span></SPAN><DIV class="row"><span class="left"><img valign="top" src="report_files/agilent.gif" /></span></DIV><img valign="top" height="80" width="150" src="report_files/hdmi_logo2.GIF" /><center><DIV style="clear:both;line-height:1em;font-size:18pt;font-weight:bold;color:black"> HDMI Test Report </DIV></center><br /><p style="margin:0.25em"><center><b>Overall Results:</b>0 of 13 Tests Failed </center></p><center><TABLE class="TestConfigDetailsTable" BORDER="none" cellspacing="1pt"><tr><td colspan="2" style="background-color:#AAA;"><b><center>Test Configuration Details</center></b></td></tr><tr><td style="text-align:center;font-weight:bold;background-color:#7AE5F8" colspan="2">Device Description</td></tr><tr><td style="text-align:left;background-color:#AAA;"><b>Device ID</b></td><td>Transmitter</td></tr><tr><td style="text-align:left;background-color:#AAA;"><b>Test Fixture Type</b></td><td>N1080A / SMA Probe</td></tr><tr><td style="text-align:left;background-color:#AAA;"><b>Jitter Separation Measurement</b></td><td>OFF</td></tr><tr><td style="text-align:left;background-color:#AAA;"><b>Connection Type</b></td><td>2 Connections</td></tr><tr><td style="text-align:center;font-weight:bold;background-color:#7AE5F8" colspan="2">Test Session Details</td></tr><tr><td style="text-align:left;background-color:#AAA;"><b>Infiniium SW Version</b></td><td>05.10.0000 </td></tr><tr><td style="text-align:left;background-color:#AAA;"><b>Infiniium Model Number</b></td><td>DSO81204B</td></tr><tr><td style="text-align:left;background-color:#AAA;"><b>Infiniium Serial Number</b></td><td>No Serial</td></tr><tr><td style="text-align:left;background-color:#AAA;"><b>Last Test Date</b></td><td>12/7/2006 8:07:20 PM</td></tr></TABLE></center><h2 style="page-break-before:always">Summary of Results</h2><TABLE class="MarginThresholdsTable" BORDER="thin" cellspacing="0pt"><TR><TD colspan="2" class="header">Margin Thresholds</TD></TR><TR><TD class="warning">Warning</TD><TD>&lt; 2 %</TD></TR><TR><TD class="critical">Critical</TD><TD>&lt; 0 %</TD></TR></TABLE><br /><TABLE class="OverallSummaryTable" BORDER="thin" cellspacing="0pt"><TR><TD style="background-color:#AAA"><B>Pass</B></TD><TD style="background-color:#AAA"><B>Test Name</B></TD><TD style="background-color:#AAA"><B>Spec Range</B></TD><TD style="background-color:#AAA"><B>Measured Value</B></TD><TD style="background-color:#AAA"><B>Margin</B></TD></TR><TR class="odd"><TD class="passfail"><img src="&#xD;&#xA; report_files/pass.gif&#xD;&#xA; "></img></TD><TD><a href="#Test11">Clock Jitter</a></TD><TD>&lt;= 250mTbit</TD><TD>99mTbit</TD><TD class="good">60.4 % </TD></TR><TR class="even"><TD class="passfail"><img src="&#xD;&#xA; report_files/pass.gif&#xD;&#xA; "></img></TD><TD><a href="#Test0">Mask Test</a></TD><TD>Zero Mask Failures</TD><TD>0.000</TD><TD>N/A </TD></TR><TR class="odd"><TD class="passfail"><img src="&#xD;&#xA; report_files/pass.gif&#xD;&#xA; "></img></TD><TD><a href="#Test1">Data Jitter</a></TD><TD>&lt;=0.3Tbit</TD><TD>145m</TD><TD class="good">51.7 % </TD></TR><TR class="even"><TD class="passfail"><img src="&#xD;&#xA; report_files/pass.gif&#xD;&#xA; "></img></TD><TD><a href="#Test20">Clock Rise Time</a></TD><TD>&gt;= 75.000ps</TD><TD>84.850ps</TD><TD class="good">13.1 % </TD></TR><TR class="odd"><TD class="passfail"><img src="&#xD;&#xA; report_files/pass.gif&#xD;&#xA; "></img></TD><TD><a href="#Test21">Clock Fall Time</a></TD><TD>&gt;= 75.000ps</TD><TD>83.710ps</TD><TD class="good">11.6 % </TD></TR><TR class="even"><TD class="passfail"><img src="&#xD;&#xA; report_files/pass.gif&#xD;&#xA; "></img></TD><TD><a href="#Test22">Data Lane A Rise Time</a></TD><TD>&gt;= 75.000ps</TD><TD>90.041ps</TD><TD class="good">20.1 % </TD></TR><TR class="odd"><TD class="passfail"><img src="&#xD;&#xA; report_files/pass.gif&#xD;&#xA; "></img></TD><TD><a href="#Test23">Data Lane A Fall Time</a></TD><TD>&gt;= 75.000ps</TD><TD>99.383ps</TD><TD class="good">32.5 % </TD></TR><TR class="even"><TD class="passfail"><img src="&#xD;&#xA; report_files/pass.gif&#xD;&#xA; "></img></TD><TD><a href="#Test40">Clock - Overshoot</a></TD><TD>&lt;=15%</TD><TD>6.267</TD><TD class="good">58.2 % </TD></TR><TR class="odd"><TD class="passfail"><img src="&#xD;&#xA; report_files/pass.gif&#xD;&#xA; "></img></TD><TD><a href="#Test41">Clock - Undershoot</a></TD><TD>&lt;=25%</TD><TD>5.467</TD><TD class="good">78.1 % </TD></TR><TR class="even"><TD class="passfail"><img src="&#xD;&#xA; report_files/pass.gif&#xD;&#xA; "></img></TD><TD><a href="#Test42">Data Lane A - Overshoot</a></TD><TD>&lt;=15%</TD><TD>5.000</TD><TD class="good">66.7 % </TD></TR><TR class="odd"><TD class="passfail"><img src="&#xD;&#xA; report_files/pass.gif&#xD;&#xA; "></img></TD><TD><a href="#Test43">Data Lane A - Undershoot</a></TD><TD>&lt;=25%</TD><TD>12.715</TD><TD class="good">49.1 % </TD></TR><TR class="even"><TD class="passfail"><img src="&#xD;&#xA; report_files/pass.gif&#xD;&#xA; "></img></TD><TD><a href="#Test51">Clock Duty Cycle(Minimum)</a></TD><TD>&gt;=40%</TD><TD>51.010</TD><TD class="good">27.5 % </TD></TR><TR class="odd"><TD class="passfail"><img src="&#xD;&#xA; report_files/pass.gif&#xD;&#xA; "></img></TD><TD><a href="#Test52">Clock Duty Cycle(Maximum)</a></TD><TD>&lt;=60%</TD><TD>51.510</TD><TD class="good">14.2 % </TD></TR></TABLE><br /><br style="page-break-before:always" /><h2> Report Detail</h2><br></br><a name="Test11"></a><DIV class="TESTHEADER"><SPAN class="passfail"><img src="report_files/pass.gif"></img></SPAN><SPAN class="testname">Clock Jitter</SPAN><SPAN class="SpecReference"> Reference: HDMI CTS 1.1,Test ID 7-9</SPAN></DIV><SPAN class="TestDescription"><SPAN class="TestSummary"><span style="valign:top;padding-left:2pt;padding-right:2pt;background-color=black;color:white;"> Test Summary: </span><span class="Pass">Pass</span></SPAN><span><span style="margin-left:4px;valign:top;flow:left;padding-top:0px;padding-left:4px;padding-right:4px;text-decoration:underline;border-right: 1pt black solid"> Test Description: </span><span style="text-indent:2em;margin-left:6px;margin-right:4px">TMDS differential clock jitter must not exceed 0.25*Tbit, relative to the ideal Recovery Clock. For compliance, the DUT should output all the required pixel clock frequency for all the test.</span></span><br style="clear:both" /><SPAN class="FieldValueBlock"><span class="Field">Test Limits:</span><span class="Value">VALUE &lt;= 250mTbit</span></SPAN><SPAN class="FieldValueBlock"><span class="Field">Clock Jitter (worst of 3)</span><span class="Value">99mTbit</span></SPAN></SPAN><SPAN class="ClearIfCompact"></SPAN><DIV class="TestSummary"></DIV><DIV class="ReferenceDivider"><span class="ReferenceDividerSpan">Result Details:</span></DIV><br style="clear:both" /><h3 class="nospace">Trial Summary</h3><TABLE class="TrialSummaryTable" BORDER="0" cellspacing="0" CELLPADDING="2px"><tr><TD STYLE="background-color:#AAA;font-weight:bold;border-bottom:thin solid black;border-top:thin solid black; padding-left:.25em;padding-right:.25em"> P/F </TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Trial #</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Actual Value</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Margin</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Test Frequency(MHz)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em"># Edges</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Tbit(ps)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Clock Jitter(ps)</TD></tr><tr class="odd"><TD class="odd"><img SRC="report_files/pass.gif" /></TD><TD class="odd">Trial 1</TD><TD class="odd">99mTbit</TD><TD class="odd">60.4</TD><TD class="odd">148.347</TD><TD class="odd">16.00000M</TD><TD class="odd">674.094</TD><TD class="odd">66.650</TD></tr><tr class="even"><TD class="even"><img SRC="report_files/pass.gif" /></TD><TD class="even">Trial 2</TD><TD class="even">89mTbit</TD><TD class="even">64.4</TD><TD class="even">148.513</TD><TD class="even">16.00000M</TD><TD class="even">673.342</TD><TD class="even">59.910</TD></tr><tr class="odd"><TD class="odd_underline"><img SRC="report_files/pass.gif" /></TD><TD class="odd_underline">Trial 3</TD><TD class="odd_underline">97mTbit</TD><TD class="odd_underline">61.2</TD><TD class="odd_underline">148.391</TD><TD class="odd_underline">16.00000M</TD><TD class="odd_underline">673.897</TD><TD class="odd_underline">65.150</TD></tr></TABLE><DIV style="clear:both;"><b>Clock Jitter</b></DIV><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 1: Clock Jitter</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\11_1_Clock Jitter_Clock Jitter.png"></IMG></span></div></span><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 2: Clock Jitter</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\11_2_Clock Jitter_Clock Jitter.png"></IMG></span></div></span><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 3: Clock Jitter</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\11_3_Clock Jitter_Clock Jitter.png"></IMG></span></div></span><br style="page-break-before:always;"></br><a name="Test0"></a><DIV class="TESTHEADER"><SPAN class="passfail"><img src="report_files/pass.gif"></img></SPAN><SPAN class="testname">Mask Test</SPAN><SPAN class="SpecReference"> Reference: HDMI CTS 1.1,Test ID 7-10</SPAN></DIV><SPAN class="TestDescription"><SPAN class="TestSummary"><span style="valign:top;padding-left:2pt;padding-right:2pt;background-color=black;color:white;"> Test Summary: </span><span class="Pass">Pass</span></SPAN><span><span style="margin-left:4px;valign:top;flow:left;padding-top:0px;padding-left:4px;padding-right:4px;text-decoration:underline;border-right: 1pt black solid"> Test Description: </span><span style="text-indent:2em;margin-left:6px;margin-right:4px">For all channels under all operating conditions specified in Table 4-11 . The Source shall have output levels at TP1, which meet the normalized eye diagram requirements.</span></span><br style="clear:both" /><SPAN class="FieldValueBlock"><span class="Field">Test Limits:</span><span class="Value">Zero Mask Failures</span></SPAN><SPAN class="FieldValueBlock"><span class="Field"># Mask Failures (worst of 3)</span><span class="Value">0.000</span></SPAN></SPAN><SPAN class="ClearIfCompact"></SPAN><DIV class="TestSummary"></DIV><DIV class="ReferenceDivider"><span class="ReferenceDividerSpan">Result Details:</span></DIV><br style="clear:both" /><h3 class="nospace">Trial Summary</h3><TABLE class="TrialSummaryTable" BORDER="0" cellspacing="0" CELLPADDING="2px"><tr><TD STYLE="background-color:#AAA;font-weight:bold;border-bottom:thin solid black;border-top:thin solid black; padding-left:.25em;padding-right:.25em"> P/F </TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Trial #</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Actual Value</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Margin</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Maximum Margin</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Data Lane A</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Test Frequency(MHz)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Mask Moved(ps)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em"># Acquisitions Point</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Tbit(ps)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">RightJitterData(Tbit)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">LeftJitterData(Tbit)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">RightJitterData(ps)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">LeftJitterData(ps)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Differential Swing Voltage(mV)</TD></tr><tr class="odd"><TD class="odd"><img SRC="report_files/pass.gif" /></TD><TD class="odd">Trial 1</TD><TD class="odd">0.000</TD><TD class="odd">N/A </TD><TD class="odd">0.000000s</TD><TD class="odd">D0</TD><TD class="odd">148.347</TD><TD class="odd">0.000</TD><TD class="odd">16.00000M</TD><TD class="odd">673.417</TD><TD class="odd">145m</TD><TD class="odd">145m</TD><TD class="odd">97.500</TD><TD class="odd">97.500</TD><TD class="odd">800.000</TD></tr><tr class="even"><TD class="even"><img SRC="report_files/pass.gif" /></TD><TD class="even">Trial 2</TD><TD class="even">0.000</TD><TD class="even">N/A </TD><TD class="even">0.000000s</TD><TD class="even">D0</TD><TD class="even">148.513</TD><TD class="even">0.000</TD><TD class="even">16.00000M</TD><TD class="even">673.381</TD><TD class="even">138m</TD><TD class="even">138m</TD><TD class="even">93.000</TD><TD class="even">93.000</TD><TD class="even">800.000</TD></tr><tr class="odd"><TD class="odd_underline"><img SRC="report_files/pass.gif" /></TD><TD class="odd_underline">Trial 3</TD><TD class="odd_underline">0.000</TD><TD class="odd_underline">N/A </TD><TD class="odd_underline">0.000000s</TD><TD class="odd_underline">D0</TD><TD class="odd_underline">148.391</TD><TD class="odd_underline">0.000</TD><TD class="odd_underline">16.00000M</TD><TD class="odd_underline">673.414</TD><TD class="odd_underline">143m</TD><TD class="odd_underline">145m</TD><TD class="odd_underline">96.000</TD><TD class="odd_underline">97.500</TD><TD class="odd_underline">800.000</TD></tr><tr class="TrialSummaryRow"><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow">Mean</TD><TD class="TrialSummaryRow">0.000</TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow">0.000</TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow"></TD></tr><tr class="TrialSummaryRow"><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow">StDev</TD><TD class="TrialSummaryRow">0.000</TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow">0.000</TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow"></TD></tr><tr class="TrialSummaryRow"><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow">Range</TD><TD class="TrialSummaryRow">0.000</TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow">0.000</TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow"></TD></tr><tr class="TrialSummaryRow"><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow">Min</TD><TD class="TrialSummaryRow">0.000</TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow">0.000</TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow"></TD></tr><tr class="TrialSummaryRow"><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow">Max</TD><TD class="TrialSummaryRow">0.000</TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow">0.000</TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow"></TD><TD class="TrialSummaryRow"></TD></tr></TABLE><DIV style="clear:both;"><b># Mask Failures</b></DIV><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 1: # Mask Failures</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\0_1_Mask Test__ Mask Failures.png"></IMG></span></div></span><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 2: # Mask Failures</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\0_2_Mask Test__ Mask Failures.png"></IMG></span></div></span><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 3: # Mask Failures</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\0_3_Mask Test__ Mask Failures.png"></IMG></span></div></span><br style="page-break-before:always;"></br><a name="Test1"></a><DIV class="TESTHEADER"><SPAN class="passfail"><img src="report_files/pass.gif"></img></SPAN><SPAN class="testname">Data Jitter</SPAN><SPAN class="SpecReference"> Reference: HDMI CTS 1.1,Test ID 7-10</SPAN></DIV><SPAN class="TestDescription"><SPAN class="TestSummary"><span style="valign:top;padding-left:2pt;padding-right:2pt;background-color=black;color:white;"> Test Summary: </span><span class="Pass">Pass</span></SPAN><span><span style="margin-left:4px;valign:top;flow:left;padding-top:0px;padding-left:4px;padding-right:4px;text-decoration:underline;border-right: 1pt black solid"> Test Description: </span><span style="text-indent:2em;margin-left:6px;margin-right:4px">For all channels under all operating conditions specified in Table 4-11 . The Source shall have output levels at TP1, which meet the normalized eye diagram requirements.</span></span><br style="clear:both" /><SPAN class="FieldValueBlock"><span class="Field">Test Limits:</span><span class="Value">&lt;=0.3Tbit</span></SPAN><SPAN class="FieldValueBlock"><span class="Field">TbitCheck (worst of 3)</span><span class="Value">145m</span></SPAN></SPAN><SPAN class="ClearIfCompact"></SPAN><DIV class="TestSummary"></DIV><DIV class="ReferenceDivider"><span class="ReferenceDividerSpan">Result Details:</span></DIV><br style="clear:both" /><h3 class="nospace">Trial Summary</h3><TABLE class="TrialSummaryTable" BORDER="0" cellspacing="0" CELLPADDING="2px"><tr><TD STYLE="background-color:#AAA;font-weight:bold;border-bottom:thin solid black;border-top:thin solid black; padding-left:.25em;padding-right:.25em"> P/F </TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Trial #</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Actual Value</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Margin</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Data Lane A</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Test Frequency(MHz)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Mask Moved(ps)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em"># Acquisitions Point</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Tbit(ps)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">RightJitterData(Tbit)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">LeftJitterData(Tbit)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">RightJitterData(ps)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">LeftJitterData(ps)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Differential Swing Voltage(mV)</TD></tr><tr class="odd"><TD class="odd"><img SRC="report_files/pass.gif" /></TD><TD class="odd">Trial 1</TD><TD class="odd">145m</TD><TD class="odd">51.7</TD><TD class="odd">D0</TD><TD class="odd">148.347</TD><TD class="odd">0.000</TD><TD class="odd">16.00000M</TD><TD class="odd">673.417</TD><TD class="odd">145m</TD><TD class="odd">145m</TD><TD class="odd">97.500</TD><TD class="odd">97.500</TD><TD class="odd">800.000</TD></tr><tr class="even"><TD class="even"><img SRC="report_files/pass.gif" /></TD><TD class="even">Trial 2</TD><TD class="even">138m</TD><TD class="even">54.0</TD><TD class="even">D0</TD><TD class="even">148.513</TD><TD class="even">0.000</TD><TD class="even">16.00000M</TD><TD class="even">673.381</TD><TD class="even">138m</TD><TD class="even">138m</TD><TD class="even">93.000</TD><TD class="even">93.000</TD><TD class="even">800.000</TD></tr><tr class="odd"><TD class="odd_underline"><img SRC="report_files/pass.gif" /></TD><TD class="odd_underline">Trial 3</TD><TD class="odd_underline">145m</TD><TD class="odd_underline">51.7</TD><TD class="odd_underline">D0</TD><TD class="odd_underline">148.391</TD><TD class="odd_underline">0.000</TD><TD class="odd_underline">16.00000M</TD><TD class="odd_underline">673.414</TD><TD class="odd_underline">143m</TD><TD class="odd_underline">145m</TD><TD class="odd_underline">96.000</TD><TD class="odd_underline">97.500</TD><TD class="odd_underline">800.000</TD></tr></TABLE><DIV style="clear:both;"><b>TbitCheck</b></DIV><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 1: TbitCheck</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\1_1_Data Jitter_TbitCheck.png"></IMG></span></div></span><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 2: TbitCheck</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\1_2_Data Jitter_TbitCheck.png"></IMG></span></div></span><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 3: TbitCheck</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\1_3_Data Jitter_TbitCheck.png"></IMG></span></div></span><br style="page-break-before:always;"></br><a name="Test20"></a><DIV class="TESTHEADER"><SPAN class="passfail"><img src="report_files/pass.gif"></img></SPAN><SPAN class="testname">Clock Rise Time</SPAN><SPAN class="SpecReference"> Reference: HDMI CTS 1.1,Test ID 7-4</SPAN></DIV><SPAN class="TestDescription"><SPAN class="TestSummary"><span style="valign:top;padding-left:2pt;padding-right:2pt;background-color=black;color:white;"> Test Summary: </span><span class="Pass">Pass</span></SPAN><span><span style="margin-left:4px;valign:top;flow:left;padding-top:0px;padding-left:4px;padding-right:4px;text-decoration:underline;border-right: 1pt black solid"> Test Description: </span><span style="text-indent:2em;margin-left:6px;margin-right:4px">The transition time is defined as the time interval between the normalized 20% and 80% amplitude levels. For compliance, the DUT should output the highest supported pixel clock frequency during the test.</span></span><br style="clear:both" /><SPAN class="FieldValueBlock"><span class="Field">Test Limits:</span><span class="Value">VALUE &gt;= 75.000ps</span></SPAN><SPAN class="FieldValueBlock"><span class="Field">Raw clock transition time (worst of 3)</span><span class="Value">84.850ps</span></SPAN></SPAN><SPAN class="ClearIfCompact"></SPAN><DIV class="TestSummary"></DIV><DIV class="ReferenceDivider"><span class="ReferenceDividerSpan">Result Details:</span></DIV><br style="clear:both" /><h3 class="nospace">Trial Summary</h3><TABLE class="TrialSummaryTable" BORDER="0" cellspacing="0" CELLPADDING="2px"><tr><TD STYLE="background-color:#AAA;font-weight:bold;border-bottom:thin solid black;border-top:thin solid black; padding-left:.25em;padding-right:.25em"> P/F </TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Trial #</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Actual Value</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Margin</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Test Frequency(MHz)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Upper Threshold(%)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Lower Threshold(%)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em"># Edges</TD></tr><tr class="odd"><TD class="odd"><img SRC="report_files/pass.gif" /></TD><TD class="odd">Trial 1</TD><TD class="odd">85.070ps</TD><TD class="odd">13.4</TD><TD class="odd">148.347</TD><TD class="odd">80.000</TD><TD class="odd">20.000</TD><TD class="odd">7.610000k</TD></tr><tr class="even"><TD class="even"><img SRC="report_files/pass.gif" /></TD><TD class="even">Trial 2</TD><TD class="even">84.850ps</TD><TD class="even">13.1</TD><TD class="even">148.513</TD><TD class="even">80.000</TD><TD class="even">20.000</TD><TD class="even">7.610000k</TD></tr><tr class="odd"><TD class="odd_underline"><img SRC="report_files/pass.gif" /></TD><TD class="odd_underline">Trial 3</TD><TD class="odd_underline">85.820ps</TD><TD class="odd_underline">14.4</TD><TD class="odd_underline">148.391</TD><TD class="odd_underline">80.000</TD><TD class="odd_underline">20.000</TD><TD class="odd_underline">7.610000k</TD></tr></TABLE><DIV style="clear:both;"><b>Raw clock transition time</b></DIV><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 1: Raw clock transition time</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\20_1_Clock Rise Time_Raw clock transition time.png"></IMG></span></div></span><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 2: Raw clock transition time</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\20_2_Clock Rise Time_Raw clock transition time.png"></IMG></span></div></span><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 3: Raw clock transition time</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\20_3_Clock Rise Time_Raw clock transition time.png"></IMG></span></div></span><br style="page-break-before:always;"></br><a name="Test21"></a><DIV class="TESTHEADER"><SPAN class="passfail"><img src="report_files/pass.gif"></img></SPAN><SPAN class="testname">Clock Fall Time</SPAN><SPAN class="SpecReference"> Reference: HDMI CTS 1.1,Test ID 7-4</SPAN></DIV><SPAN class="TestDescription"><SPAN class="TestSummary"><span style="valign:top;padding-left:2pt;padding-right:2pt;background-color=black;color:white;"> Test Summary: </span><span class="Pass">Pass</span></SPAN><span><span style="margin-left:4px;valign:top;flow:left;padding-top:0px;padding-left:4px;padding-right:4px;text-decoration:underline;border-right: 1pt black solid"> Test Description: </span><span style="text-indent:2em;margin-left:6px;margin-right:4px">The transition time is defined as the time interval between the normalized 20% and 80% amplitude levels. For compliance, the DUT should output the highest supported pixel clock frequency during the test.</span></span><br style="clear:both" /><SPAN class="FieldValueBlock"><span class="Field">Test Limits:</span><span class="Value">VALUE &gt;= 75.000ps</span></SPAN><SPAN class="FieldValueBlock"><span class="Field">Raw clock transition time (worst of 3)</span><span class="Value">83.710ps</span></SPAN></SPAN><SPAN class="ClearIfCompact"></SPAN><DIV class="TestSummary"></DIV><DIV class="ReferenceDivider"><span class="ReferenceDividerSpan">Result Details:</span></DIV><br style="clear:both" /><h3 class="nospace">Trial Summary</h3><TABLE class="TrialSummaryTable" BORDER="0" cellspacing="0" CELLPADDING="2px"><tr><TD STYLE="background-color:#AAA;font-weight:bold;border-bottom:thin solid black;border-top:thin solid black; padding-left:.25em;padding-right:.25em"> P/F </TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Trial #</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Actual Value</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Margin</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Test Frequency(MHz)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Upper Threshold(%)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Lower Threshold(%)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em"># Edges</TD></tr><tr class="odd"><TD class="odd"><img SRC="report_files/pass.gif" /></TD><TD class="odd">Trial 1</TD><TD class="odd">83.710ps</TD><TD class="odd">11.6</TD><TD class="odd">148.347</TD><TD class="odd">80.000</TD><TD class="odd">20.000</TD><TD class="odd">7.610000k</TD></tr><tr class="even"><TD class="even"><img SRC="report_files/pass.gif" /></TD><TD class="even">Trial 2</TD><TD class="even">84.790ps</TD><TD class="even">13.1</TD><TD class="even">148.513</TD><TD class="even">80.000</TD><TD class="even">20.000</TD><TD class="even">7.610000k</TD></tr><tr class="odd"><TD class="odd_underline"><img SRC="report_files/pass.gif" /></TD><TD class="odd_underline">Trial 3</TD><TD class="odd_underline">84.010ps</TD><TD class="odd_underline">12.0</TD><TD class="odd_underline">148.391</TD><TD class="odd_underline">80.000</TD><TD class="odd_underline">20.000</TD><TD class="odd_underline">7.610000k</TD></tr></TABLE><DIV style="clear:both;"><b>Raw clock transition time</b></DIV><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 1: Raw clock transition time</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\21_1_Clock Fall Time_Raw clock transition time.png"></IMG></span></div></span><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 2: Raw clock transition time</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\21_2_Clock Fall Time_Raw clock transition time.png"></IMG></span></div></span><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 3: Raw clock transition time</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\21_3_Clock Fall Time_Raw clock transition time.png"></IMG></span></div></span><br style="page-break-before:always;"></br><a name="Test22"></a><DIV class="TESTHEADER"><SPAN class="passfail"><img src="report_files/pass.gif"></img></SPAN><SPAN class="testname">Data Lane A Rise Time</SPAN><SPAN class="SpecReference"> Reference: HDMI CTS 1.1,Test ID 7-4</SPAN></DIV><SPAN class="TestDescription"><SPAN class="TestSummary"><span style="valign:top;padding-left:2pt;padding-right:2pt;background-color=black;color:white;"> Test Summary: </span><span class="Pass">Pass</span></SPAN><span><span style="margin-left:4px;valign:top;flow:left;padding-top:0px;padding-left:4px;padding-right:4px;text-decoration:underline;border-right: 1pt black solid"> Test Description: </span><span style="text-indent:2em;margin-left:6px;margin-right:4px">The transition time is defined as the time interval between the normalized 20% and 80% amplitude levels. For compliance, the DUT should output the highest supported pixel clock frequency during the test.</span></span><br style="clear:both" /><SPAN class="FieldValueBlock"><span class="Field">Test Limits:</span><span class="Value">VALUE &gt;= 75.000ps</span></SPAN><SPAN class="FieldValueBlock"><span class="Field">Transition Time (worst of 3)</span><span class="Value">90.041ps</span></SPAN></SPAN><SPAN class="ClearIfCompact"></SPAN><DIV class="TestSummary"></DIV><DIV class="ReferenceDivider"><span class="ReferenceDividerSpan">Result Details:</span></DIV><br style="clear:both" /><h3 class="nospace">Trial Summary</h3><TABLE class="TrialSummaryTable" BORDER="0" cellspacing="0" CELLPADDING="2px"><tr><TD STYLE="background-color:#AAA;font-weight:bold;border-bottom:thin solid black;border-top:thin solid black; padding-left:.25em;padding-right:.25em"> P/F </TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Trial #</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Actual Value</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Margin</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Test Frequency(MHz)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Data Lane A</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Upper Threshold(%)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Lower Threshold(%)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">#Edge</TD></tr><tr class="odd"><TD class="odd"><img SRC="report_files/pass.gif" /></TD><TD class="odd">Trial 1</TD><TD class="odd">90.041ps</TD><TD class="odd">20.1</TD><TD class="odd">148.347</TD><TD class="odd">D0</TD><TD class="odd">80.000</TD><TD class="odd">20.000</TD><TD class="odd">1.000000k</TD></tr><tr class="even"><TD class="even"><img SRC="report_files/pass.gif" /></TD><TD class="even">Trial 2</TD><TD class="even">93.760ps</TD><TD class="even">25.0</TD><TD class="even">148.513</TD><TD class="even">D0</TD><TD class="even">80.000</TD><TD class="even">20.000</TD><TD class="even">1.000000k</TD></tr><tr class="odd"><TD class="odd_underline"><img SRC="report_files/pass.gif" /></TD><TD class="odd_underline">Trial 3</TD><TD class="odd_underline">91.788ps</TD><TD class="odd_underline">22.4</TD><TD class="odd_underline">148.391</TD><TD class="odd_underline">D0</TD><TD class="odd_underline">80.000</TD><TD class="odd_underline">20.000</TD><TD class="odd_underline">1.000000k</TD></tr></TABLE><DIV style="clear:both;"><b>Histogram</b></DIV><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 1: Histogram</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\histogram_RISE_0.png"></IMG></span></div></span><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 2: Histogram</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\histogram_RISE_1.png"></IMG></span></div></span><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 3: Histogram</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\histogram_RISE_2.png"></IMG></span></div></span><DIV style="clear:both;"><b>Transition Time</b></DIV><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 1: Transition Time</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\22_1_Data Lane A Rise Time_Transition Time.png"></IMG></span></div></span><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 2: Transition Time</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\22_2_Data Lane A Rise Time_Transition Time.png"></IMG></span></div></span><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 3: Transition Time</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\22_3_Data Lane A Rise Time_Transition Time.png"></IMG></span></div></span><br style="page-break-before:always;"></br><a name="Test23"></a><DIV class="TESTHEADER"><SPAN class="passfail"><img src="report_files/pass.gif"></img></SPAN><SPAN class="testname">Data Lane A Fall Time</SPAN><SPAN class="SpecReference"> Reference: HDMI CTS 1.1,Test ID 7-4</SPAN></DIV><SPAN class="TestDescription"><SPAN class="TestSummary"><span style="valign:top;padding-left:2pt;padding-right:2pt;background-color=black;color:white;"> Test Summary: </span><span class="Pass">Pass</span></SPAN><span><span style="margin-left:4px;valign:top;flow:left;padding-top:0px;padding-left:4px;padding-right:4px;text-decoration:underline;border-right: 1pt black solid"> Test Description: </span><span style="text-indent:2em;margin-left:6px;margin-right:4px">The transition time is defined as the time interval between the normalized 20% and 80% amplitude levels. For compliance, the DUT should output the highest supported pixel clock frequency during the test.</span></span><br style="clear:both" /><SPAN class="FieldValueBlock"><span class="Field">Test Limits:</span><span class="Value">VALUE &gt;= 75.000ps</span></SPAN><SPAN class="FieldValueBlock"><span class="Field">Transition Time (worst of 3)</span><span class="Value">99.383ps</span></SPAN></SPAN><SPAN class="ClearIfCompact"></SPAN><DIV class="TestSummary"></DIV><DIV class="ReferenceDivider"><span class="ReferenceDividerSpan">Result Details:</span></DIV><br style="clear:both" /><h3 class="nospace">Trial Summary</h3><TABLE class="TrialSummaryTable" BORDER="0" cellspacing="0" CELLPADDING="2px"><tr><TD STYLE="background-color:#AAA;font-weight:bold;border-bottom:thin solid black;border-top:thin solid black; padding-left:.25em;padding-right:.25em"> P/F </TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Trial #</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Actual Value</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Margin</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Test Frequency(MHz)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Data Lane A</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Upper Threshold(%)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Lower Threshold(%)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">#Edge</TD></tr><tr class="odd"><TD class="odd"><img SRC="report_files/pass.gif" /></TD><TD class="odd">Trial 1</TD><TD class="odd">99.383ps</TD><TD class="odd">32.5</TD><TD class="odd">148.347</TD><TD class="odd">D0</TD><TD class="odd">80.000</TD><TD class="odd">20.000</TD><TD class="odd">1.000000k</TD></tr><tr class="even"><TD class="even"><img SRC="report_files/pass.gif" /></TD><TD class="even">Trial 2</TD><TD class="even">103.200ps</TD><TD class="even">37.6</TD><TD class="even">148.513</TD><TD class="even">D0</TD><TD class="even">80.000</TD><TD class="even">20.000</TD><TD class="even">1.000000k</TD></tr><tr class="odd"><TD class="odd_underline"><img SRC="report_files/pass.gif" /></TD><TD class="odd_underline">Trial 3</TD><TD class="odd_underline">103.100ps</TD><TD class="odd_underline">37.5</TD><TD class="odd_underline">148.391</TD><TD class="odd_underline">D0</TD><TD class="odd_underline">80.000</TD><TD class="odd_underline">20.000</TD><TD class="odd_underline">1.000000k</TD></tr></TABLE><DIV style="clear:both;"><b>Histogram</b></DIV><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 1: Histogram</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\histogram_FALL_0.png"></IMG></span></div></span><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 2: Histogram</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\histogram_FALL_1.png"></IMG></span></div></span><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 3: Histogram</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\histogram_FALL_2.png"></IMG></span></div></span><DIV style="clear:both;"><b>Transition Time</b></DIV><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 1: Transition Time</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\23_1_Data Lane A Fall Time_Transition Time.png"></IMG></span></div></span><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 2: Transition Time</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\23_2_Data Lane A Fall Time_Transition Time.png"></IMG></span></div></span><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 3: Transition Time</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\23_3_Data Lane A Fall Time_Transition Time.png"></IMG></span></div></span><br style="page-break-before:always;"></br><a name="Test40"></a><DIV class="TESTHEADER"><SPAN class="passfail"><img src="report_files/pass.gif"></img></SPAN><SPAN class="testname">Clock - Overshoot</SPAN><SPAN class="SpecReference"> Reference: HDMI CTS 1.1,Test ID 7-5</SPAN></DIV><SPAN class="TestDescription"><SPAN class="TestSummary"><span style="valign:top;padding-left:2pt;padding-right:2pt;background-color=black;color:white;"> Test Summary: </span><span class="Pass">Pass</span></SPAN><span><span style="margin-left:4px;valign:top;flow:left;padding-top:0px;padding-left:4px;padding-right:4px;text-decoration:underline;border-right: 1pt black solid"> Test Description: </span><span style="text-indent:2em;margin-left:6px;margin-right:4px">TMDS overshoot must be below 15% of 2*VSWING. For compliance, the DUT should output the lowest supported pixel clock frequency during the test.</span></span><br style="clear:both" /><SPAN class="FieldValueBlock"><span class="Field">Test Limits:</span><span class="Value">&lt;=15%</span></SPAN><SPAN class="FieldValueBlock"><span class="Field">Overshoot (worst of 3)</span><span class="Value">6.267</span></SPAN></SPAN><SPAN class="ClearIfCompact"></SPAN><DIV class="TestSummary"></DIV><DIV class="ReferenceDivider"><span class="ReferenceDividerSpan">Result Details:</span></DIV><br style="clear:both" /><h3 class="nospace">Trial Summary</h3><TABLE class="TrialSummaryTable" BORDER="0" cellspacing="0" CELLPADDING="2px"><tr><TD STYLE="background-color:#AAA;font-weight:bold;border-bottom:thin solid black;border-top:thin solid black; padding-left:.25em;padding-right:.25em"> P/F </TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Trial #</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Actual Value</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Margin</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Test Frequency(MHz)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em"># Edges</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Differential Swing Voltage(mV)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">VH(mV)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">VL(mV)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">VH+(mV)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">VH+(%)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">VL-(mV)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">VL-(%)</TD></tr><tr class="odd"><TD class="odd"><img SRC="report_files/pass.gif" /></TD><TD class="odd">Trial 1</TD><TD class="odd">6.267</TD><TD class="odd">58.2</TD><TD class="odd">148.347</TD><TD class="odd">1.000000k</TD><TD class="odd">750.000</TD><TD class="odd">380.000</TD><TD class="odd">-370.000</TD><TD class="odd">44.000</TD><TD class="odd">5.867</TD><TD class="odd">47.000</TD><TD class="odd">6.267</TD></tr><tr class="even"><TD class="even"><img SRC="report_files/pass.gif" /></TD><TD class="even">Trial 2</TD><TD class="even">5.459</TD><TD class="even">63.6</TD><TD class="even">148.513</TD><TD class="even">1.000000k</TD><TD class="even">751.000</TD><TD class="even">380.000</TD><TD class="even">-371.000</TD><TD class="even">41.000</TD><TD class="even">5.459</TD><TD class="even">36.000</TD><TD class="even">4.794</TD></tr><tr class="odd"><TD class="odd_underline"><img SRC="report_files/pass.gif" /></TD><TD class="odd_underline">Trial 3</TD><TD class="odd_underline">5.578</TD><TD class="odd_underline">62.8</TD><TD class="odd_underline">148.391</TD><TD class="odd_underline">1.000000k</TD><TD class="odd_underline">753.000</TD><TD class="odd_underline">383.000</TD><TD class="odd_underline">-370.000</TD><TD class="odd_underline">39.000</TD><TD class="odd_underline">5.179</TD><TD class="odd_underline">42.000</TD><TD class="odd_underline">5.578</TD></tr></TABLE><DIV style="clear:both;"><b>VH, VH+, VH-</b></DIV><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 1: VH, VH+, VH-</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\40_1_Clock - Overshoot_VHImage.png"></IMG></span></div></span><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 2: VH, VH+, VH-</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\40_2_Clock - Overshoot_VHImage.png"></IMG></span></div></span><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 3: VH, VH+, VH-</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\40_3_Clock - Overshoot_VHImage.png"></IMG></span></div></span><DIV style="clear:both;"><b>VL, VL+, VL-</b></DIV><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 1: VL, VL+, VL-</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\40_1_Clock - Overshoot_VLImage.png"></IMG></span></div></span><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 2: VL, VL+, VL-</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\40_2_Clock - Overshoot_VLImage.png"></IMG></span></div></span><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 3: VL, VL+, VL-</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\40_3_Clock - Overshoot_VLImage.png"></IMG></span></div></span><br style="page-break-before:always;"></br><a name="Test41"></a><DIV class="TESTHEADER"><SPAN class="passfail"><img src="report_files/pass.gif"></img></SPAN><SPAN class="testname">Clock - Undershoot</SPAN><SPAN class="SpecReference"> Reference: HDMI CTS 1.1,Test ID 7-5</SPAN></DIV><SPAN class="TestDescription"><SPAN class="TestSummary"><span style="valign:top;padding-left:2pt;padding-right:2pt;background-color=black;color:white;"> Test Summary: </span><span class="Pass">Pass</span></SPAN><span><span style="margin-left:4px;valign:top;flow:left;padding-top:0px;padding-left:4px;padding-right:4px;text-decoration:underline;border-right: 1pt black solid"> Test Description: </span><span style="text-indent:2em;margin-left:6px;margin-right:4px">TMDS undershoot must below 25% of 2*VSWING. For compliance, the DUT should output the lowest supported pixel clock frequency during the test.</span></span><br style="clear:both" /><SPAN class="FieldValueBlock"><span class="Field">Test Limits:</span><span class="Value">&lt;=25%</span></SPAN><SPAN class="FieldValueBlock"><span class="Field">Undershoot (worst of 3)</span><span class="Value">5.467</span></SPAN></SPAN><SPAN class="ClearIfCompact"></SPAN><DIV class="TestSummary"></DIV><DIV class="ReferenceDivider"><span class="ReferenceDividerSpan">Result Details:</span></DIV><br style="clear:both" /><h3 class="nospace">Trial Summary</h3><TABLE class="TrialSummaryTable" BORDER="0" cellspacing="0" CELLPADDING="2px"><tr><TD STYLE="background-color:#AAA;font-weight:bold;border-bottom:thin solid black;border-top:thin solid black; padding-left:.25em;padding-right:.25em"> P/F </TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Trial #</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Actual Value</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Margin</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Test Frequency(MHz)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em"># Edges</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Differential Swing Voltage(mV)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">VH(mV)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">VL(mV)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">VH-(mV)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">VH-(%)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">VL+(mV)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">VL+(%)</TD></tr><tr class="odd"><TD class="odd"><img SRC="report_files/pass.gif" /></TD><TD class="odd">Trial 1</TD><TD class="odd">5.467</TD><TD class="odd">78.1</TD><TD class="odd">148.347</TD><TD class="odd">1.000000k</TD><TD class="odd">750.000</TD><TD class="odd">380.000</TD><TD class="odd">-370.000</TD><TD class="odd">41.000</TD><TD class="odd">5.467</TD><TD class="odd">36.000</TD><TD class="odd">4.800</TD></tr><tr class="even"><TD class="even"><img SRC="report_files/pass.gif" /></TD><TD class="even">Trial 2</TD><TD class="even">3.196</TD><TD class="even">87.2</TD><TD class="even">148.513</TD><TD class="even">1.000000k</TD><TD class="even">751.000</TD><TD class="even">380.000</TD><TD class="even">-371.000</TD><TD class="even">24.000</TD><TD class="even">3.196</TD><TD class="even">23.000</TD><TD class="even">3.063</TD></tr><tr class="odd"><TD class="odd_underline"><img SRC="report_files/pass.gif" /></TD><TD class="odd_underline">Trial 3</TD><TD class="odd_underline">3.453</TD><TD class="odd_underline">86.2</TD><TD class="odd_underline">148.391</TD><TD class="odd_underline">1.000000k</TD><TD class="odd_underline">753.000</TD><TD class="odd_underline">383.000</TD><TD class="odd_underline">-370.000</TD><TD class="odd_underline">26.000</TD><TD class="odd_underline">3.453</TD><TD class="odd_underline">21.000</TD><TD class="odd_underline">2.789</TD></tr></TABLE><DIV style="clear:both;"><b>VH, VH+, VH-</b></DIV><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 1: VH, VH+, VH-</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\40_1_Clock - Overshoot_VHImage.png"></IMG></span></div></span><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 2: VH, VH+, VH-</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\40_2_Clock - Overshoot_VHImage.png"></IMG></span></div></span><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 3: VH, VH+, VH-</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\40_3_Clock - Overshoot_VHImage.png"></IMG></span></div></span><DIV style="clear:both;"><b>VL, VL+, VL-</b></DIV><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 1: VL, VL+, VL-</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\40_1_Clock - Overshoot_VLImage.png"></IMG></span></div></span><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 2: VL, VL+, VL-</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\40_2_Clock - Overshoot_VLImage.png"></IMG></span></div></span><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 3: VL, VL+, VL-</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\40_3_Clock - Overshoot_VLImage.png"></IMG></span></div></span><br style="page-break-before:always;"></br><a name="Test42"></a><DIV class="TESTHEADER"><SPAN class="passfail"><img src="report_files/pass.gif"></img></SPAN><SPAN class="testname">Data Lane A - Overshoot</SPAN><SPAN class="SpecReference"> Reference: HDMI CTS 1.1,Test ID 7-5</SPAN></DIV><SPAN class="TestDescription"><SPAN class="TestSummary"><span style="valign:top;padding-left:2pt;padding-right:2pt;background-color=black;color:white;"> Test Summary: </span><span class="Pass">Pass</span></SPAN><span><span style="margin-left:4px;valign:top;flow:left;padding-top:0px;padding-left:4px;padding-right:4px;text-decoration:underline;border-right: 1pt black solid"> Test Description: </span><span style="text-indent:2em;margin-left:6px;margin-right:4px">TMDS overshoot must be below 15% of 2*VSWING. For compliance, the DUT should output the lowest supported pixel clock frequency during the test.</span></span><br style="clear:both" /><SPAN class="FieldValueBlock"><span class="Field">Test Limits:</span><span class="Value">&lt;=15%</span></SPAN><SPAN class="FieldValueBlock"><span class="Field">Overshoot (worst of 3)</span><span class="Value">5.000</span></SPAN></SPAN><SPAN class="ClearIfCompact"></SPAN><DIV class="TestSummary"></DIV><DIV class="ReferenceDivider"><span class="ReferenceDividerSpan">Result Details:</span></DIV><br style="clear:both" /><h3 class="nospace">Trial Summary</h3><TABLE class="TrialSummaryTable" BORDER="0" cellspacing="0" CELLPADDING="2px"><tr><TD STYLE="background-color:#AAA;font-weight:bold;border-bottom:thin solid black;border-top:thin solid black; padding-left:.25em;padding-right:.25em"> P/F </TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Trial #</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Actual Value</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Margin</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Test Frequency(MHz)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em"># Edges</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Data Lane A</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Differential Swing Voltage(mV)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">VH(mV)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">VL(mV)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">VH+(mV)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">VH+(%)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">VL-(mV)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">VL-(%)</TD></tr><tr class="odd"><TD class="odd"><img SRC="report_files/pass.gif" /></TD><TD class="odd">Trial 1</TD><TD class="odd">3.374</TD><TD class="odd">77.5</TD><TD class="odd">148.347</TD><TD class="odd">1.000000k</TD><TD class="odd">D0</TD><TD class="odd">730.000</TD><TD class="odd">380.000</TD><TD class="odd">-361.000</TD><TD class="odd">25.000</TD><TD class="odd">3.374</TD><TD class="odd">25.000</TD><TD class="odd">3.374</TD></tr><tr class="even"><TD class="even"><img SRC="report_files/pass.gif" /></TD><TD class="even">Trial 2</TD><TD class="even">1.854</TD><TD class="even">87.6</TD><TD class="even">148.513</TD><TD class="even">1.000000k</TD><TD class="even">D0</TD><TD class="even">757.000</TD><TD class="even">390.000</TD><TD class="even">-365.000</TD><TD class="even">13.000</TD><TD class="even">1.722</TD><TD class="even">14.000</TD><TD class="even">1.854</TD></tr><tr class="odd"><TD class="odd_underline"><img SRC="report_files/pass.gif" /></TD><TD class="odd_underline">Trial 3</TD><TD class="odd_underline">5.000</TD><TD class="odd_underline">66.7</TD><TD class="odd_underline">148.391</TD><TD class="odd_underline">1.000000k</TD><TD class="odd_underline">D0</TD><TD class="odd_underline">740.000</TD><TD class="odd_underline">379.000</TD><TD class="odd_underline">-361.000</TD><TD class="odd_underline">37.000</TD><TD class="odd_underline">5.000</TD><TD class="odd_underline">32.000</TD><TD class="odd_underline">4.324</TD></tr></TABLE><DIV style="clear:both;"><b>VH, VH+, VH-</b></DIV><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 1: VH, VH+, VH-</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\42_1_Data Lane A - Overshoot_VHImage.png"></IMG></span></div></span><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 2: VH, VH+, VH-</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\42_2_Data Lane A - Overshoot_VHImage.png"></IMG></span></div></span><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 3: VH, VH+, VH-</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\42_3_Data Lane A - Overshoot_VHImage.png"></IMG></span></div></span><DIV style="clear:both;"><b>VL, VL+, VL-</b></DIV><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 1: VL, VL+, VL-</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\42_1_Data Lane A - Overshoot_VLImage.png"></IMG></span></div></span><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 2: VL, VL+, VL-</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\42_2_Data Lane A - Overshoot_VLImage.png"></IMG></span></div></span><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 3: VL, VL+, VL-</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\42_3_Data Lane A - Overshoot_VLImage.png"></IMG></span></div></span><br style="page-break-before:always;"></br><a name="Test43"></a><DIV class="TESTHEADER"><SPAN class="passfail"><img src="report_files/pass.gif"></img></SPAN><SPAN class="testname">Data Lane A - Undershoot</SPAN><SPAN class="SpecReference"> Reference: HDMI CTS 1.1,Test ID 7-5</SPAN></DIV><SPAN class="TestDescription"><SPAN class="TestSummary"><span style="valign:top;padding-left:2pt;padding-right:2pt;background-color=black;color:white;"> Test Summary: </span><span class="Pass">Pass</span></SPAN><span><span style="margin-left:4px;valign:top;flow:left;padding-top:0px;padding-left:4px;padding-right:4px;text-decoration:underline;border-right: 1pt black solid"> Test Description: </span><span style="text-indent:2em;margin-left:6px;margin-right:4px">TMDS undershoot must below 25% of 2*VSWING. For compliance, the DUT should output the lowest supported pixel clock frequency during the test.</span></span><br style="clear:both" /><SPAN class="FieldValueBlock"><span class="Field">Test Limits:</span><span class="Value">&lt;=25%</span></SPAN><SPAN class="FieldValueBlock"><span class="Field">Undershoot (worst of 3)</span><span class="Value">12.715</span></SPAN></SPAN><SPAN class="ClearIfCompact"></SPAN><DIV class="TestSummary"></DIV><DIV class="ReferenceDivider"><span class="ReferenceDividerSpan">Result Details:</span></DIV><br style="clear:both" /><h3 class="nospace">Trial Summary</h3><TABLE class="TrialSummaryTable" BORDER="0" cellspacing="0" CELLPADDING="2px"><tr><TD STYLE="background-color:#AAA;font-weight:bold;border-bottom:thin solid black;border-top:thin solid black; padding-left:.25em;padding-right:.25em"> P/F </TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Trial #</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Actual Value</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Margin</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Test Frequency(MHz)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em"># Edges</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Data Lane A</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Differential Swing Voltage(mV)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">VH(mV)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">VL(mV)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">VH-(mV)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">VH-(%)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">VL+(mV)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">VL+(%)</TD></tr><tr class="odd"><TD class="odd"><img SRC="report_files/pass.gif" /></TD><TD class="odd">Trial 1</TD><TD class="odd">10.121</TD><TD class="odd">59.5</TD><TD class="odd">148.347</TD><TD class="odd">1.000000k</TD><TD class="odd">D0</TD><TD class="odd">730.000</TD><TD class="odd">380.000</TD><TD class="odd">-361.000</TD><TD class="odd">69.000</TD><TD class="odd">9.312</TD><TD class="odd">75.000</TD><TD class="odd">10.121</TD></tr><tr class="even"><TD class="even"><img SRC="report_files/pass.gif" /></TD><TD class="even">Trial 2</TD><TD class="even">12.715</TD><TD class="even">49.1</TD><TD class="even">148.513</TD><TD class="even">1.000000k</TD><TD class="even">D0</TD><TD class="even">757.000</TD><TD class="even">390.000</TD><TD class="even">-365.000</TD><TD class="even">96.000</TD><TD class="even">12.715</TD><TD class="even">79.000</TD><TD class="even">10.464</TD></tr><tr class="odd"><TD class="odd_underline"><img SRC="report_files/pass.gif" /></TD><TD class="odd_underline">Trial 3</TD><TD class="odd_underline">6.486</TD><TD class="odd_underline">74.1</TD><TD class="odd_underline">148.391</TD><TD class="odd_underline">1.000000k</TD><TD class="odd_underline">D0</TD><TD class="odd_underline">740.000</TD><TD class="odd_underline">379.000</TD><TD class="odd_underline">-361.000</TD><TD class="odd_underline">48.000</TD><TD class="odd_underline">6.486</TD><TD class="odd_underline">48.000</TD><TD class="odd_underline">6.486</TD></tr></TABLE><DIV style="clear:both;"><b>VH, VH+, VH-</b></DIV><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 1: VH, VH+, VH-</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\42_1_Data Lane A - Overshoot_VHImage.png"></IMG></span></div></span><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 2: VH, VH+, VH-</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\42_2_Data Lane A - Overshoot_VHImage.png"></IMG></span></div></span><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 3: VH, VH+, VH-</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\42_3_Data Lane A - Overshoot_VHImage.png"></IMG></span></div></span><DIV style="clear:both;"><b>VL, VL+, VL-</b></DIV><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 1: VL, VL+, VL-</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\42_1_Data Lane A - Overshoot_VLImage.png"></IMG></span></div></span><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 2: VL, VL+, VL-</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\42_2_Data Lane A - Overshoot_VLImage.png"></IMG></span></div></span><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 3: VL, VL+, VL-</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\42_3_Data Lane A - Overshoot_VLImage.png"></IMG></span></div></span><br style="page-break-before:always;"></br><a name="Test51"></a><DIV class="TESTHEADER"><SPAN class="passfail"><img src="report_files/pass.gif"></img></SPAN><SPAN class="testname">Clock Duty Cycle(Minimum)</SPAN><SPAN class="SpecReference"> Reference: HDMI CTS 1.1,Test ID 7-8</SPAN></DIV><SPAN class="TestDescription"><SPAN class="TestSummary"><span style="valign:top;padding-left:2pt;padding-right:2pt;background-color=black;color:white;"> Test Summary: </span><span class="Pass">Pass</span></SPAN><span><span style="margin-left:4px;valign:top;flow:left;padding-top:0px;padding-left:4px;padding-right:4px;text-decoration:underline;border-right: 1pt black solid"> Test Description: </span><span style="text-indent:2em;margin-left:6px;margin-right:4px">Clock duty cycle must be at least 40% and not more than 60%.The Source shall meet the AC specifications in Table 4-13 across all operating conditions specified in Table 4-11. For compliance, the DUT should output the highest supported pixel clock frequency during the test.</span></span><br style="clear:both" /><SPAN class="FieldValueBlock"><span class="Field">Test Limits:</span><span class="Value">&gt;=40%</span></SPAN><SPAN class="FieldValueBlock"><span class="Field">Clock Duty Cycle Minimum (worst of 3)</span><span class="Value">51.010</span></SPAN></SPAN><SPAN class="ClearIfCompact"></SPAN><DIV class="TestSummary"></DIV><DIV class="ReferenceDivider"><span class="ReferenceDividerSpan">Result Details:</span></DIV><br style="clear:both" /><h3 class="nospace">Trial Summary</h3><TABLE class="TrialSummaryTable" BORDER="0" cellspacing="0" CELLPADDING="2px"><tr><TD STYLE="background-color:#AAA;font-weight:bold;border-bottom:thin solid black;border-top:thin solid black; padding-left:.25em;padding-right:.25em"> P/F </TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Trial #</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Actual Value</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Margin</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Test Frequency(MHz)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em"># Edges</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">TdutyMIN(ns)</TD></tr><tr class="odd"><TD class="odd"><img SRC="report_files/pass.gif" /></TD><TD class="odd">Trial 1</TD><TD class="odd">51.040</TD><TD class="odd">27.6</TD><TD class="odd">148.347</TD><TD class="odd">1.000000k</TD><TD class="odd">3.440</TD></tr><tr class="even"><TD class="even"><img SRC="report_files/pass.gif" /></TD><TD class="even">Trial 2</TD><TD class="even">51.200</TD><TD class="even">28.0</TD><TD class="even">148.513</TD><TD class="even">1.000000k</TD><TD class="even">3.447</TD></tr><tr class="odd"><TD class="odd_underline"><img SRC="report_files/pass.gif" /></TD><TD class="odd_underline">Trial 3</TD><TD class="odd_underline">51.010</TD><TD class="odd_underline">27.5</TD><TD class="odd_underline">148.391</TD><TD class="odd_underline">1.000000k</TD><TD class="odd_underline">3.438</TD></tr></TABLE><DIV style="clear:both;"><b>Clock Duty Cycle Minimum</b></DIV><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 1: Clock Duty Cycle Minimum</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\51_1_Clock Duty Cycle(Minimum)_Clock Duty Cycle Minimum.png"></IMG></span></div></span><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 2: Clock Duty Cycle Minimum</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\51_2_Clock Duty Cycle(Minimum)_Clock Duty Cycle Minimum.png"></IMG></span></div></span><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 3: Clock Duty Cycle Minimum</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\51_3_Clock Duty Cycle(Minimum)_Clock Duty Cycle Minimum.png"></IMG></span></div></span><br style="page-break-before:always;"></br><a name="Test52"></a><DIV class="TESTHEADER"><SPAN class="passfail"><img src="report_files/pass.gif"></img></SPAN><SPAN class="testname">Clock Duty Cycle(Maximum)</SPAN><SPAN class="SpecReference"> Reference: HDMI CTS 1.1,Test ID 7-8</SPAN></DIV><SPAN class="TestDescription"><SPAN class="TestSummary"><span style="valign:top;padding-left:2pt;padding-right:2pt;background-color=black;color:white;"> Test Summary: </span><span class="Pass">Pass</span></SPAN><span><span style="margin-left:4px;valign:top;flow:left;padding-top:0px;padding-left:4px;padding-right:4px;text-decoration:underline;border-right: 1pt black solid"> Test Description: </span><span style="text-indent:2em;margin-left:6px;margin-right:4px">Clock duty cycle must be at least 40% and not more than 60%.The Source shall meet the AC specifications in Table 4-13 across all operating conditions specified in Table 4-11. For compliance, the DUT should output the highest supported pixel clock frequency during the test.</span></span><br style="clear:both" /><SPAN class="FieldValueBlock"><span class="Field">Test Limits:</span><span class="Value">&lt;=60%</span></SPAN><SPAN class="FieldValueBlock"><span class="Field">Clock Duty Cycle Maximum (worst of 3)</span><span class="Value">51.510</span></SPAN></SPAN><SPAN class="ClearIfCompact"></SPAN><DIV class="TestSummary"></DIV><DIV class="ReferenceDivider"><span class="ReferenceDividerSpan">Result Details:</span></DIV><br style="clear:both" /><h3 class="nospace">Trial Summary</h3><TABLE class="TrialSummaryTable" BORDER="0" cellspacing="0" CELLPADDING="2px"><tr><TD STYLE="background-color:#AAA;font-weight:bold;border-bottom:thin solid black;border-top:thin solid black; padding-left:.25em;padding-right:.25em"> P/F </TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Trial #</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Actual Value</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Margin</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">Test Frequency(MHz)</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em"># Edges</TD><TD valign="bottom" style="background-color:#AAA;font-weight:bold;border-top:thin solid black;border-bottom:thin solid black;padding-left:.25em;padding-right:.25em">TdutyMAX(ns)</TD></tr><tr class="odd"><TD class="odd"><img SRC="report_files/pass.gif" /></TD><TD class="odd">Trial 1</TD><TD class="odd">51.350</TD><TD class="odd">14.4</TD><TD class="odd">148.347</TD><TD class="odd">1.000000k</TD><TD class="odd">3.461</TD></tr><tr class="even"><TD class="even"><img SRC="report_files/pass.gif" /></TD><TD class="even">Trial 2</TD><TD class="even">51.510</TD><TD class="even">14.2</TD><TD class="even">148.513</TD><TD class="even">1.000000k</TD><TD class="even">3.468</TD></tr><tr class="odd"><TD class="odd_underline"><img SRC="report_files/pass.gif" /></TD><TD class="odd_underline">Trial 3</TD><TD class="odd_underline">51.480</TD><TD class="odd_underline">14.2</TD><TD class="odd_underline">148.391</TD><TD class="odd_underline">1.000000k</TD><TD class="odd_underline">3.469</TD></tr></TABLE><DIV style="clear:both;"><b>Clock Duty Cycle Maximum</b></DIV><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 1: Clock Duty Cycle Maximum</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\52_1_Clock Duty Cycle(Maximum)_Clock Duty Cycle Maximum.png"></IMG></span></div></span><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 2: Clock Duty Cycle Maximum</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\52_2_Clock Duty Cycle(Maximum)_Clock Duty Cycle Maximum.png"></IMG></span></div></span><span style="ClearIfVerbose" /><span class="ImageTable"><div class="ImageCaption">Trial 3: Clock Duty Cycle Maximum</div><div class="ImageTableRow"><span class="ImageTableCell"><IMG class="scopegrat" src="report_files\52_3_Clock Duty Cycle(Maximum)_Clock Duty Cycle Maximum.png"></IMG></span></div></span></BODY></HTML>